gronod/esphome-waveshare-esp32-s3-audio-va
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Hardware
MichalZaniewicz edited this page 2026-07-18 19:04:49 +02:00
Table of Contents

Hardware

A working reference for the board. The fully sourced version, with every value attributed and the source conflicts documented, is docs/HARDWARE.md in the repository. This page is the short form.

Board

  • ESP32-S3R8: dual-core LX7 at 240 MHz, 8 MB octal PSRAM, 16 MB flash.
  • ES8311 mono codec (DAC) into an NS4150B Class-D amp into the speaker.
  • ES7210 4-channel ADC with 2 physical mics (channel 3 is an AEC loopback).
  • TCA9555 I/O expander for the amp-enable line and the three buttons.
  • 7x WS2812B RGB ring, driven directly over RMT.
  • PCF85063 RTC, DVP camera and SPI LCD connectors, USB-C, Li-ion header.
  • Wi-Fi 2.4 GHz and BLE (no Bluetooth Classic, so no A2DP).

ESPHome target: board: esp32-s3-devkitc-1, variant: esp32s3, flash_size: 16MB, framework esp-idf, psram: {mode: octal, speed: 80MHz}.

Pinout

I2S (shared clock pair): MCLK 12  BCLK 13  LRCLK 14   DIN 15 (mic)  DOUT 16 (spk)
I2C (one bus):           SDA 11   SCL 10   100 kHz
LED ring (WS2812):       DATA 38  (7 LEDs, RGB order, verify with a red test)
BOOT button:             GPIO0 (active low). RESET is hardware, not readable.

I2C addresses: ES8311 0x18, ES7210 0x40, TCA9555 0x20, PCF85063 0x51.

The BCLK and LRCLK pins are shared between the DAC and the ADC. That single shared clock pair is the reason for the two-bus audio design. See Audio architecture.

TCA9555 expander (0x20)

EXIO Function Used
8 PA_EN, amplifier enable (active high) yes
9 Key1 (active low) volume down
10 Key2 (active low) play-pause
11 Key3 (active low) volume up
6 / 7 USB / camera clock mux never drive either

Driving EXIO6 or EXIO7 can disable USB and force manual download mode before every flash. On a voice build, leave both alone.

Buttons

Five buttons are physically present:

  • Key1, Key2, Key3 on the expander: mapped to volume down, play-pause, volume up.
  • BOOT (GPIO0): free and usable at runtime. It is a strapping pin, so holding it during boot enters download mode, but a normal press while running reads fine.
  • RESET: a hardware reset line (CHIP_PU), not readable as a GPIO, so it cannot be repurposed in firmware.

Things this firmware does not use

Speaker, mics, ring and buttons only. The SD slot, LCD, camera, RTC and battery divider are wired on the board but not configured here. Battery monitoring in particular is effectively unavailable: it needs a 0 Ohm resistor soldered, and enabling it makes the camera unusable.

Known gotchas

  • Cold-boot mic/LED failure: a single unanswered community report describes the mic and ring not coming up on a cold boot until a reset. No root cause or fix has been published. This firmware applies a mechanism-based mitigation (driving the expander direction registers and PA_EN at boot) but does not claim to have solved it.
  • RGB vs GRB: sources disagree on the ring colour order. Confirm with a pure-red test before trusting either.
  • Strapping pins: a camera left plugged into the DVP connector sits on GPIO45 and GPIO46, both of which must be low at boot, and can stop the board booting.

The full detail and the source-by-source reasoning are in docs/HARDWARE.md.

Guide

Links