Files
AutoFilm-ESP32/docs/megaplans/integration/I01-board-configs.md
gronod a33b4b0c74
ci / test (push) Successful in 1m4s
ci / firmware (jc4827w543, sdkconfig.s3, esp32s3) (push) Successful in 3m56s
ci / firmware (wroom, sdkconfig.wroom, esp32) (push) Successful in 3m57s
ci / test (pull_request) Successful in 1m22s
ci / firmware (wroom, sdkconfig.wroom, esp32) (pull_request) Successful in 4m42s
ci / firmware (jc4827w543, sdkconfig.s3, esp32s3) (pull_request) Successful in 4m47s
Mark I01 status DONE
2026-09-16 21:05:57 +01:00

1.3 KiB

STATUS: DONE DEPENDS: none

READ: docs/megaplans/INTEGRATION-MEGAPLAN.md, docs/JC4827W543_PIN_AUDIT_VERIFIED.md, components/board_jc4827w543/board.c, components/board_wroom/board.c

IN:

  1. board_jc4827w543: add board_pin_motor_step() → 16, board_pin_motor_dir() → 15, board_pin_temp() → 17, board_pin_spk_bclk(), board_pin_spk_lrclk(), board_pin_spk_din() → 42, 2, 41; change board_pin_motor_en() → 7 (keep disable level 1 = active-LOW EN).
  2. board_wroom: add matching board_pin_motor_step() → 12, board_pin_motor_dir() → 14, board_pin_temp() → 13 so HAL impls can be shared.
  3. Update docs/CURRENT_STATE.md pin table note and JC4827W543_PIN_AUDIT_VERIFIED.md header section with the corrected labels if not already updated (P2: IO46/9/14/5, P3: IO6/7/15/16, P4: GND/3V3/17/18).

OUT: HAL implementations, business logic, NVS profiles. FORBIDDEN: GPIO46 for any output; stealing TF, QSPI, GT911, USB, or UART0 pins.

VERIFY: idf.py build succeeds for both esp32 and esp32s3 targets.

COMMITS:

  1. Lock S3 header pins and introduce shared board pin accessors
  2. Update pin audit documentation labels

DoD checkboxes:

  • board_jc4827w543 pin accessors added.
  • board_wroom pin accessors added.
  • Build succeeds on both targets.