Author SHA1 Message Date
gronod ce9d729027 Tick A04 DoD checkbox after CI green
ci / test (push) Successful in 1m11s
ci / firmware (jc4827w543, sdkconfig.s3, esp32s3) (push) Successful in 3m51s
ci / firmware (wroom, sdkconfig.wroom, esp32) (push) Successful in 3m53s
2026-09-17 10:08:33 +01:00
gronod 06acd84928 Add esp_timer to hal_temp requires
ci / test (push) Successful in 2m6s
ci / firmware (jc4827w543, sdkconfig.s3, esp32s3) (push) Successful in 3m42s
ci / firmware (wroom, sdkconfig.wroom, esp32) (push) Successful in 3m44s
2026-09-17 09:58:29 +01:00
gronod cfd047a0ac Mark A04 status DONE
ci / test (push) Successful in 1m24s
ci / firmware (wroom, sdkconfig.wroom, esp32) (push) Failing after 7m23s
ci / firmware (jc4827w543, sdkconfig.s3, esp32s3) (push) Failing after 7m24s
2026-09-17 09:47:01 +01:00
gronod a3830a58cb Make DS18B20 conversion non-blocking in hal_temp 2026-09-17 09:46:32 +01:00
5 changed files with 54 additions and 23 deletions
+1 -1
View File
@@ -1,6 +1,6 @@
set(srcs)
set(priv_inc)
set(priv_req driver)
set(priv_req driver esp_timer)
if(IDF_TARGET STREQUAL "esp32")
list(APPEND srcs hal_temp.c)
+45 -15
View File
@@ -4,8 +4,7 @@
#include "esp_err.h"
#include "esp_log.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_timer.h"
#include "onewire_bus.h"
#include "board.h"
@@ -18,10 +17,24 @@
static const char *TAG = "temp";
#define TEMP_CONV_MS 750
typedef enum {
T_START,
T_WAIT,
} temp_state_t;
static onewire_bus_handle_t s_bus;
static bool s_inited;
static float s_last_c;
static bool s_last_ok;
static temp_state_t s_state = T_START;
static uint32_t s_deadline_ms;
static uint32_t now_ms(void)
{
return (uint32_t)(esp_timer_get_time() / 1000ULL);
}
static bool scratch_valid(const uint8_t *sp)
{
@@ -45,38 +58,55 @@ void hal_temp_tick(void)
{
if (s_bus == NULL) {
s_last_ok = false;
vTaskDelay(pdMS_TO_TICKS(750));
return;
}
uint32_t now = now_ms();
if (s_state == T_START) {
if (now < s_deadline_ms) {
return;
}
if (onewire_bus_reset(s_bus) != ESP_OK) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
uint8_t conv[2] = {CMD_SKIP_ROM, CMD_CONVERT_T};
if (onewire_bus_write_bytes(s_bus, conv, 2) != ESP_OK) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
s_deadline_ms = now + TEMP_CONV_MS;
s_state = T_WAIT;
return;
}
/* T_WAIT */
if (now < s_deadline_ms) {
return;
}
s_state = T_START;
s_deadline_ms = now;
if (onewire_bus_reset(s_bus) != ESP_OK) {
s_last_ok = false;
vTaskDelay(pdMS_TO_TICKS(750));
return;
}
uint8_t conv[2] = {CMD_SKIP_ROM, CMD_CONVERT_T};
if (onewire_bus_write_bytes(s_bus, conv, 2) != ESP_OK) {
s_last_ok = false;
vTaskDelay(pdMS_TO_TICKS(750));
return;
}
vTaskDelay(pdMS_TO_TICKS(750));
if (onewire_bus_reset(s_bus) != ESP_OK) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
uint8_t rd[2] = {CMD_SKIP_ROM, CMD_READ_SCRATCH};
if (onewire_bus_write_bytes(s_bus, rd, 2) != ESP_OK) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
uint8_t sp[9];
memset(sp, 0, sizeof(sp));
if (onewire_bus_read_bytes(s_bus, sp, sizeof(sp)) != ESP_OK) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
if (!scratch_valid(sp)) {
s_last_ok = false;
s_deadline_ms = now + TEMP_CONV_MS;
return;
}
int16_t raw = (int16_t)((uint16_t)sp[0] | ((uint16_t)sp[1] << 8));
+1 -1
View File
@@ -45,7 +45,7 @@ The branch was cut with uncommitted `components/app_machine/app_machine.c` chang
| A01 | `audit/A01-machine-timing-queue.md` | Deadline fix + FreeRTOS event queue + host queue shim | DONE |
| A02 | `audit/A02-auto-advance.md` | Restore auto-arm after step complete + test rework | DONE |
| A03 | `audit/A03-task-wdt.md` | Explicit TWDT init/reconfigure + `add()` failure logging | DONE |
| A04 | `audit/A04-temp-nonblocking.md` | OPTIONAL: non-blocking DS18B20 conversion | TODO |
| A04 | `audit/A04-temp-nonblocking.md` | OPTIONAL: non-blocking DS18B20 conversion | DONE |
## Dependency
+6 -6
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@@ -1,6 +1,6 @@
# A04 — (OPTIONAL) non-blocking DS18B20 conversion in hal_temp
STATUS: TODO (OPTIONAL — may be deferred indefinitely; if skipped, A03's explicit WDT setup already covers the constraint)
STATUS: DONE
DEPENDS: A03 (shares `temp_task` in `main/main.c`)
**READ:** this file, `docs/megaplans/AUDIT-MEGAPLAN.md`, `docs/audit_remediation_plan.md` item 5, `components/hal_temp/hal_temp.c`, `main/main.c`
@@ -30,8 +30,8 @@ plus CI firmware builds for both targets.
1. `Make DS18B20 conversion non-blocking in hal_temp`
**DoD checkboxes:**
- [ ] No `vTaskDelay(750)` inside `hal_temp_tick`; conversion waits via deadline.
- [ ] `temp_task` always blocks (explicit 100 ms delay).
- [ ] `TEMP_OFFSET`, CRC, and read semantics unchanged.
- [ ] Host ctest green; both CI firmware builds green.
- [ ] STATUS → DONE here and in the megaplan table (or noted `SKIPPED` with reason).
- [x] No `vTaskDelay(750)` inside `hal_temp_tick`; conversion waits via deadline.
- [x] `temp_task` always blocks (explicit 100 ms delay).
- [x] `TEMP_OFFSET`, CRC, and read semantics unchanged.
- [x] Host ctest green; both CI firmware builds green.
- [x] STATUS → DONE here and in the megaplan table (or noted `SKIPPED` with reason).
+1
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@@ -183,6 +183,7 @@ static void temp_task(void *arg)
bool ok = (hal_temp_read_c(&c) == ESP_OK);
app_machine_on_temp(ok ? c : 0.0f, ok);
esp_task_wdt_reset();
vTaskDelay(pdMS_TO_TICKS(100));
}
}
#endif