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(svn r4191) - Codechange: Properly set newlines and id for os_timer.c
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138
os_timer.c
138
os_timer.c
@ -1,68 +1,70 @@
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#include "stdafx.h"
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#undef RDTSC_AVAILABLE
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/* rdtsc for MSC_VER, uses simple inline assembly, or _rdtsc
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* from external win64.asm because VS2005 does not support inline assembly */
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#if defined(_MSC_VER) && !defined(RDTSC_AVAILABLE)
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# if defined (_M_AMD64)
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extern uint64 _rdtsc(void);
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# else
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uint64 _declspec(naked) _rdtsc(void)
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{
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_asm {
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rdtsc
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ret
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}
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}
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# endif
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for OS/2. Hopefully this works, who knows */
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#if defined (__WATCOMC__) && !defined(RDTSC_AVAILABLE)
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unsigned __int64 _rdtsc( void);
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# pragma aux _rdtsc = 0x0F 0x31 value [edx eax] parm nomemory modify exact [edx eax] nomemory;
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for all other *nix-en (hopefully). Use GCC syntax */
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#if defined(__i386__) || defined(__x86_64__) && !defined(RDTSC_AVAILABLE)
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uint64 _rdtsc(void)
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{
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uint32 high, low;
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__asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high));
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return ((uint64)high << 32) | low;
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}
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for PPC which has this not */
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#if defined(__POWERPC__) && !defined(RDTSC_AVAILABLE)
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uint64 _rdtsc(void)
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{
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uint32 high = 0, high2 = 0, low;
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/* PPC does not have rdtsc, so we cheat by reading the two 32-bit time-counters
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* it has, 'Move From Time Base (Upper)'. Since these are two reads, in the
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* very unlikely event that the lower part overflows to the upper part while we
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* read it; we double-check and reread the registers */
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asm volatile (
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"mftbu %0\n"
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"mftb %1\n"
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"mftbu %2\n"
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"cmpw %3,%4\n"
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"bne- $-16\n"
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: "=r" (high), "=r" (low), "=r" (high2)
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: "0" (high), "2" (high2)
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);
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return ((uint64)high << 32) | low;
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}
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# define RDTSC_AVAILABLE
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#endif
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/* In all other cases we have no support for rdtsc. No major issue,
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* you just won't be able to profile your code with TIC()/TOC() */
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#if !defined(RDTSC_AVAILABLE)
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#warning "OS has no support for rdtsc()"
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uint64 _rdtsc(void) {return 0;}
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#endif
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/* $Id$ */
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#include "stdafx.h"
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#undef RDTSC_AVAILABLE
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/* rdtsc for MSC_VER, uses simple inline assembly, or _rdtsc
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* from external win64.asm because VS2005 does not support inline assembly */
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#if defined(_MSC_VER) && !defined(RDTSC_AVAILABLE)
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# if defined (_M_AMD64)
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extern uint64 _rdtsc(void);
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# else
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uint64 _declspec(naked) _rdtsc(void)
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{
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_asm {
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rdtsc
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ret
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}
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}
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# endif
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for OS/2. Hopefully this works, who knows */
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#if defined (__WATCOMC__) && !defined(RDTSC_AVAILABLE)
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unsigned __int64 _rdtsc( void);
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# pragma aux _rdtsc = 0x0F 0x31 value [edx eax] parm nomemory modify exact [edx eax] nomemory;
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for all other *nix-en (hopefully). Use GCC syntax */
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#if defined(__i386__) || defined(__x86_64__) && !defined(RDTSC_AVAILABLE)
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uint64 _rdtsc(void)
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{
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uint32 high, low;
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__asm__ __volatile__ ("rdtsc" : "=a" (low), "=d" (high));
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return ((uint64)high << 32) | low;
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}
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# define RDTSC_AVAILABLE
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#endif
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/* rdtsc for PPC which has this not */
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#if defined(__POWERPC__) && !defined(RDTSC_AVAILABLE)
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uint64 _rdtsc(void)
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{
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uint32 high = 0, high2 = 0, low;
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/* PPC does not have rdtsc, so we cheat by reading the two 32-bit time-counters
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* it has, 'Move From Time Base (Upper)'. Since these are two reads, in the
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* very unlikely event that the lower part overflows to the upper part while we
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* read it; we double-check and reread the registers */
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asm volatile (
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"mftbu %0\n"
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"mftb %1\n"
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"mftbu %2\n"
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"cmpw %3,%4\n"
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"bne- $-16\n"
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: "=r" (high), "=r" (low), "=r" (high2)
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: "0" (high), "2" (high2)
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);
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return ((uint64)high << 32) | low;
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}
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# define RDTSC_AVAILABLE
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#endif
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/* In all other cases we have no support for rdtsc. No major issue,
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* you just won't be able to profile your code with TIC()/TOC() */
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#if !defined(RDTSC_AVAILABLE)
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#warning "OS has no support for rdtsc()"
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uint64 _rdtsc(void) {return 0;}
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#endif
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